Communications system comprising a matrix network of modulation elements

ABSTRACT

In a transmission system a shift register controlled modulator matrix is employed to filter unwanted modulation products from the frequency band.

United States Patent Leuthold [4 May 23, 1972 [54] COMMUNICATIONS SYSTEM 325/41, 42, 38 R, 38 A, 38 B, 40, 135-138, 141, 48,

COMPRISING A MATRIX NETWORK 1 1 OF 340/1461, 147, 147 Ps; ]79/l5; 328/41, 43, 46, 5501, [72] Inventor: Peter Leuthold, Erlenbach, Switzerland 56 R e Cited [73] Assignee: U.S. Philips Corporation, New York, NY. I 1 e Races 22 Filed: Aug. 21, 1970 U] l ED STATES PATENTS 3,484, 0 l2 l9 9 C al. pp NO: 65,968 55 6 oulter et 178/23 Primary Examiner-Robert L. Richardson F A 60 W Data Assistant Examiner-Albert J. Mayer [30] PM m n Attorney-Frank R. Trifari Aug. 21, I969 Switzerland ..l2694/69 June 26, 1970 Switzerland ..97l2/70 [57] ABSTRACT In a transmission system a shift register controlled modulator [52] U.S. CI ..325/l4l, 325/136, 325/l37, matrix is employed to filter unwanted modulation products 325/138, 325/143, 328/43, 328/61 from the frequency band [51] Int. Cl. H04b 1/04 [58] Field ofSearch ..178/23 R; 325/38, 38 A, 39, 20Claims,24Drawingfigu1-es SOURC MULT SHIFT REG. J l 17 -MOD ELEMENT PATENTEDMAY 23 1912 3,665,314

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1. A device for the transmission of information signals, said device comprising an information source, a first control generator, a first shift register coupled to said information source and having a plurality of shift register elements whose contents are shifted by said control generator, a second control generator, a carrier generator, a second shift register coupled to said second control generator and having a plurality of shift register elements whose contents are shifted by said second control generator, means connecting the carrier generator to the input means of said second shift register a matrix network having columns and rows which have nodes comprising modulation elements, means to couple said columns of said modulation elements respectively to the shift register elements of said first shift register, means to couple said rows of said modulation elements respectively to the shift registEr elements of said second shift register, a plurality of weighing devices coupled to said modulation elements, and a combination device for providing an output signal coupled to said weighing devices.
 2. A device as claimed in claim 1, further comprising a clock pulse generator, said information source providing information pulses at instants of clock pulses from said clock pulse generator and means to couple said first control generator to said clock pulse generator.
 3. A device as claimed in claim 1, wherein said second control generator is coupled to said carrier generator.
 4. A device as claimed in claim 2, wherein the ratio of the repetition frequencies of said carrier generator and said second control generator is equal to an integer.
 5. A device as claimed in claim 1, wherein at least one of the shift registers comprises a cascade circuit of partial shift register whose shift frequencies have different values.
 6. A device as claimed in claim 5, wherein the ratio of the shift frequencies of the partial shift registers is equal to 2i, where i is an integer.
 7. A device as claimed in claim 1, wherein said second shift register comprises a ring counter.
 8. A device as claimed in claim 1, wherein said shift register elements have two complementary output means.
 9. A device as claimed in claim 1, wherein the weighting devices connected to the output circuits of the modulation elements in the matrix and the combination device comprise by an attenuation network.
 10. A device as claimed in claim 1, wherein the modulation elements in the nodes of the matrix network comprise logic selection gates.
 11. A device as claimed in claim 1, wherein the modulation elements are provided with two complementary output means.
 12. A device as claimed in claim 1, adapted for the transmission of analog signals, wherein a sampler is incorporated between the information source and the input means of the first shift register.
 13. A device as claimed in claim 12, wherein the sampler is followed by an analog-to-digital converter.
 14. A device as claimed in claim 1, for the transmission of binary information pulses, wherein the device constitutes a modulator for the binary information pulses.
 15. A device as claimed in claim 14, wherein a code converter for establishing a binary code conversion is incorporated between the information pulse source and the first shift register.
 16. A device as claimed in claim 14, adapted for amplitude modulation, wherein the modulation elements in the nodes of the matrix network comprise AND-gates and the weighting devices connected to the output means of the AND-gates have transfer coefficients C Nu in accordance with the equations
 17. A device as claimed in claim 14, adapted for vestigial sideband modulation, wherein the modulation elements in the nodes of the matrix network comprise AND-gates and the weighting devices connected to the output means of the AND-gates have transfer coefficients C Nu in accordance with the equations:
 18. A device as claimed in claim 14, adapted for single sideband modulation, wherein the modulation elements in the nodes of the matrix network comprise AND-gates and the weighting devicE is connected to the output means of the AND-gates have transfer coefficients C Nu in accordance with the equations:
 19. A device as claimed in claim 14, adapted for phase modulation, wherein the device is formed as an amplitude modulator in which also the outputs of the shift register elements of the second shift register are connected through additional weighting devices to the combination device for compensating the carrier oscillation.
 20. A device as claimed in claim 14, adapted for phase modulation, wherein the modulation elements in the nodes of the matrix network comprise modulo-2-adders and the weighting devices connected to the modulo-2-adders have transfer coefficients C Nu Mu in accordance with the equations:
 21. A device as claimed in claim 14, adapted for frequency modulation, wherein the device is formed as an amplitude modulator and that furthermore the information source is connected through an OR-gate to the first shift register, a subcarrier pulse generator also being connected to said OR-gate, the pulse repetition frequency of said subcarrier pulse generator being greater than or equal to twice the clock frequency of the information pulses.
 22. A device as claimed in claim 14, provided with a plurality of matrix networks in which the nodes incorporate modulation elements, wherein the shift register elements of one of the shift registers are connected to the modulation element of different matrix networks.
 23. A device as claimed in claim 22, for the transmission of binary information pulses originating from two information sources with orthogonal modulation, further comprising a second information source, a third control generator, a third shift register coupled to said second information source and having a plurality of shift register elements whose contents are shifted by said third control generator, a second matrix network having columns and rows which have nodes comprising modulation elements, means to couple respectively said columns of said modulation elements of said second matrix network to said shift register, means to couple respectively said rows of said modulation elements of said second matrix network to the shift register elements of said second shift register, and a second plurality of weighing devices coupling said modulation elements of said second matrix network to said combination devices.
 24. A device as claimed in claim 22, wherein the modulation elements in the nodes of the two matrix networks comprise AND-gates and the weighting devices of the first matrix network connected to the AND-gates transfer coefficients in accordance with Claim 16, and that the weighting devices of the second matrix network have transfer coefficients C phi lambda in accordance with the equations:
 25. A device as claimed in claim 14 wherein at least three shift register elements are connected to the modulation elements in the nodes of a matrix network, with which shift register elements multiple modulation is obtained.
 26. A device as claimed in claim 1, wherein the pulses applied to the input of a shift register are simultaneously delayed in a single shift register over a period T1 multiplied by an integer Nu and over a period T2 multiplied by an integer phi , the ratio T1/T2 being rational.
 27. A device as claimed in claim 14 wherein the device for single sideband modulation is provided with a third shift register and a subcarrier oscillator for generating a subcarrier oscillation whose frequency is equal to one quarter of the clock frequency of the information pulses, while the device is furthermore provided with a single matrix network whose modulation elements are each connected to a shift register element of the three shift registers.
 28. A device as claimed in claim 1, wherein each modulation element is connected to two shift register elements of the second shift register and to one shift register element of the first shift register.
 29. A device as claimed in claim 1, wherein a periodical series of rectangular pulses of pulse repetition frequency fT is applied by the information source to the modulation elements in the nodes of the matrix network, the output circuit of each modulation element being connected through different weighting devices to different combination devices each supplying a frequency fc + or - nfT.
 30. A device as claimed in claim 29, wherein only every other shift register element is connected to a modulation element in the matrix network when pulses are applied to the shift registers whose duration is equal to half the pulse repetition period, and when a ratio given by (2m+1) : 1 with m 2, 3, 4, 5 . . . exists between the shift frequency and the double pulse repetition frequency.
 31. A device as claimed in claim 1, 1, wherein the information source also operates as a carrier oscillator so as to generate higher powers of the information pulses.
 32. A device as claimed in claim 1, wherein the device is integrated in a semiconductorbody. 